Senior Quality Process Development Engineer

Location: Burlington, Canada

Our Team

Semtech's Product Quality Engineering team is responsible for the quality and reliability of every wafer that leaves our fabs and OSAT partners on its way to customers. Our engineers thrive on solving complex technical challenges and driving improvements that directly impact product reliability and customer satisfaction including building a new generation of statistical and data-driven tools to detect, characterize, and triage wafer-level quality issues faster and more consistently than manual review alone can achieve. You'll join a team where mentorship, technical excellence, and knowledge sharing create a culture of growth, innovation, and tangible impact.

Job Summary

The Senior Quality Process Development Engineer will collaborate on the design, development, and validation the statistical and machine-learning systems at the core of Semtech's quality processes along with our tool software partners. This role will define the technical development specifications for quality process improvement activities; including detection and pattern-recognition capabilities that distinguish genuine product and process issues from test-induced artifacts, and that support downstream risk assessment and mitigation for production wafer lots. The engineer will work closely with our tool development partners, internal AI team, Quality Engineering, Product Engineering, and the in-house wafer assessment tool development team to integrate these capabilities into existing production systems and will build learned pattern-recognition models from engineer-confirmed labels to complement rules-based statistical detection.

Responsibilities

• Design and build statistical and algorithmic detection tools for wafer probe data — including test hardware integrity checks, software bin/yield outlier detection, parametric drift analysis, and reticle- and wafer-level spatial pattern classification — leveraging Semtech's existing statistical infrastructure (20%)
• Assist on the development of learned pattern-recognition models that classify wafer-level failure patterns from engineer-confirmed examples, complementing the statistical tool set and supporting multi-pattern classification with confidence indicators. Risk-tiering, prioritization, and mitigation-proposal logic — including known-issue catalog matching, lot-level systemic risk reporting, and drafting of wafer-map modification scripts (20%)
• Drive along with the tool software teams the buildup of relationship-analysis and reporting layer that reconciles detection outputs into a consolidated set of distinct issues, including LLM-driven contextualization using product and test/bin naming data, and structured, self-describing output for downstream risk assessment (20%)
• Identify and drive development and requirements for AI process improvement initiatives among the quality engineering teams. (20%)
• Partner with Quality Engineering, Product Engineering, and the AI development team to validate system performance against production fab lots, and produce documentation and knowledge-transfer materials that support long-term, in-house ownership of the system (20%)

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, Statistics, or a related field required; Master's or PhD preferred
• 5+ years of professional experience in software engineering, applied statistics, or data science, with a track record of shipping production statistical or machine-learning systems
• Strong foundation in applied statistics, including outlier and anomaly detection, multiple-comparison correction, and hypothesis testing on production or sensor data
• Hands-on experience building and deploying machine learning classification models, including training on labeled data and handling out-of-distribution/novel-category detection
• Proficiency in Python (or equivalent) for data analysis and ML model development, and strong SQL or equivalent skills for working with large structured production datasets
• Demonstrated ability to design structured, self-describing system outputs and to write clear technical documentation for engineering audiences

Desired Qualifications

• Experience with semiconductor test data, wafer probe, or final test engineering, including familiarity with concepts such as software binning, parametric test limits, and wafer map analysis
• Direct experience with a comparable semiconductor test-data / yield-analysis platform
• Experience building LLM-driven analysis or reporting systems that incorporate domain context to scope and focus model output
• Familiarity with spatial/statistical process control methods (e.g., Tukey-method outlier detection, radial/angular trend analysis, spatial clustering) as applied to manufacturing data
• Prior experience working in a regulated or quality-critical manufacturing environment where system outputs feed formal disposition or non-conforming material review processes

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description.

All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.

We may leverage Artificial Intelligence (AI) tools to enhance efficiency during candidate screening, assessment, and recruitment. Final hiring decisions remain with our Hiring Teams, not AI systems.

A reasonable estimate of the pay range for this position is $95,000CAD-$120,000CAD There are several factors taken into consideration in determining base salary, including but not limited to: job-related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package.