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Altera

FPGA Development Tools Engineer

  • Seen live on Altera's site yesterday
  • Mid level
Pay
$100k to $130k a year CAD
Location
Toronto, Ontario, Canada
Open for
17+ days
First seen
Oct 18, 2026
Apply on Altera's site (opens in a new tab)

Posting record

No flags

Open 17+ days

The posting's record, oldest first
  1. Altera's site dates the posting
  2. Ghostless first sees this listing
  3. Last checked: still up
How we know

It hasn't been reposted, listed twice, or left up unusually long, and the posting doesn't say it's a talent pool.

Ghostless records the day it first sees a posting, so a repost can't reset its age. This one was already up when Ghostless started tracking Altera, so its true age is longer.

Last checked Nov 3, 2026.

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What it asks of you

3+ years of experience
“Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, or related field with 3+ years of experience in the following skills:” (quoted from the posting)

What the posting discloses

Pay
$100k to $130k a year CAD
Estimated Salary Range: $100,000 - $130,000 CAD (quoted from the posting)
Real vacancy
Yes, an existing vacancy
This posting is for an existing vacancy. (quoted from the posting)
AI screening
Uses AI to screen applicants
We use artificial intelligence to screen, assess, or select applicants for the position. (quoted from the posting)
Why these three

Ontario requires postings from employers with 25 or more staff to state the pay, whether the vacancy exists, and whether AI screens applicants.

Skills mentioned

About the role

Job Details

Job Description

About Us

Altera is at the forefront of programmable logic and hardware acceleration. Our mission is to empower developers and system architects to rapidly design and deploy cutting-edge solutions using advanced FPGA and SoC technologies. The High Level Synthesis (HLS) team at Altera specializes in creating sophisticated tools and compiler technologies that translate high-level programming languages into efficient hardware implementations. Join us and help shape the future of HLS, enabling faster innovation in fields such as AI, cloud computing, and embedded systems.

Responsibilities

  • Assist in the development and maintenance of HLS compiler infrastructure.
  • Support the implementation of compiler passes and code transformations to optimize high-level code for hardware synthesis.
  • Analyze and improve compilation flow from C/C++ to hardware description languages.
  • Research in cutting edge compiler technology for AI computation workload
  • Help integrate and test new features in HLS compilers, focusing on performance and resource optimization.
  • Participate in debugging and validating compiler outputs.
  • Document work and contribute to internal knowledge bases.

What We Offer

  • Mentorship and hands-on training from experienced compiler and hardware engineers.
  • Competitive salary and benefits.
  • Opportunities for professional growth and advancement.
  • Supportive and innovative work environment.

Our compensation is designed to reflect the Canadian labour market. The actual salary offered may vary based on several factors, including the position’s location, as well as the candidate’s experience, skills, training, and job-specific knowledge. In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.

Estimated Salary Range: $100,000 - $130,000 CAD

We use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role.

Qualifications

Qualifications

Minimum Qualifications

Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, or related field with 3+ years of experience in the following skills

  • Academic or project experience with C/C++ programming.
  • Familiarity with compiler concepts (parsing, code generation, optimization) through coursework or personal projects.
  • Exposure to digital logic design fundamentals and hardware flows (FPGA/ASIC)

Preferred Qualifications

  • Eagerness to learn about HLS compilers and hardware synthesis.
  • Good analytical, communication, and teamwork skills.
  • Coursework or internship experience in compiler development or hardware synthesis.
  • Familiarity with MLIR, LLVM, or Clang.
  • Exposure to HLS tools (e.g., Xilinx Vivado HLS, Intel HLS).
  • Basic understanding of hardware description languages (Verilog/VHDL).
  • Experience with version control systems (e.g., Git).

Job Type

Regular

Shift

Shift 1 (Canada)

Primary Location

Toronto, Ontario, Canada

Additional Locations

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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