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NXP Semiconductors

Entry Level DFT Design Engineer

  • Seen live on NXP Semiconductors' site today
  • New grad
Pay
Not stated
Location
Austin (Oakhill, Office)
Open for
15 days
First seen
Oct 20, 2026
Apply on NXP Semiconductors' site (opens in a new tab)

Posting record

No flags

Open 15 days

The posting's record, oldest first
  1. Ghostless first sees this listing
  2. Last checked: still up
How we know

It hasn't been reposted, listed twice, or left up unusually long, and the posting doesn't say it's a talent pool.

Ghostless records the day it first sees a posting, so a repost can't reset its age.

Last checked Nov 4, 2026.

How well do you match?

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What it asks of you

Bachelor's degree asked for
“Recent graduate (0-2yrs) with Bachelors or Masters in Engineering: EE, Computer Engineering, CS, EET, or equivalent” (quoted from the posting)

What the posting discloses

Not stated: Pay, real vacancy, AI screening.

Why these three

Ontario requires postings from employers with 25 or more staff to state the pay, whether the vacancy exists, and whether AI screens applicants.

Some employers add pay only on their own site. Check the original posting before you rule it out.

Skills mentioned

About the role

In this role, you will

  • Participate in global Design teams bringing new microprocessor based SoC designs through initial test requirements to generating and supporting DFT structural test pattern debug and into full scale production.
  • Team functions include test pattern specification and creation, pre-silicon verification, pattern conversions to ATE, and post-silicon pattern debug.
  • Team is a part of the design organization and supports the Test Engineering team with the patterns for manufacturing test, qualification, yield enhancement, and product performance analysis.
  • Team serves as focal point in interfacing with Test Engineering, Product Engineering, and Fab for the Design team.
  • Team specifies built-in test features for the designs, implements, and validates the design. Team is responsible for delivery of all DFT test patterns for the product.

Qualifications

  • Recent graduate (0-2yrs) with Bachelors or Masters in Engineering: EE, Computer Engineering, CS, EET, or equivalent
  • Python, Verilog, Perl, Tcl, and Unix.
  • Experience with multiple aspects of the following:
  • Structural Test design requirements
  • ATPG, Test Coverage, Fault Universe
  • JTAG, BSDL
  • Memory and Logic BIST
  • DFT Logic
  • Knowledge/experience with ATPG / DFT tools: FastScan; LBIST, MBIST , DFTCompiler, etc.
  • Semiconductor Testing
  • ATE VLSI Tester programming and usage (J973, Tiger/Catalyst, UltraFex, or Verigy 93000, ) a plus
  • Knowledge/experience with functional pattern test
  • Must possess excellent oral and written communication skills and be to partner with team members from other departments, disciplines, and cultures to achieve common goals in a high performance culture. Must have proven track record of being able to work with minimal direction and still meet schedules
  • Must be able to multi-task and prioritize tasks to meet customer needs

Anticipated hire date: Q1 2027

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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