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Huawei Canada

Principal Scientist - Software/Hardware Co-design

  • Seen live on Huawei Canada's site yesterday
  • Senior
Pay
Not stated
Location
Markham, Ontario, Canada
Open for
13+ days
First seen
Oct 22, 2026
Apply on Huawei Canada's site (opens in a new tab)

Posting record

No flags

Open 13+ days

The posting's record, oldest first
  1. Already up when Ghostless started watching Huawei Canada
  2. Last checked: still up
How we know

It hasn't been reposted, listed twice, or left up unusually long, and the posting doesn't say it's a talent pool.

Ghostless records the day it first sees a posting, so a repost can't reset its age. This one was already up when Ghostless started tracking Huawei Canada, so its true age is longer.

Last checked Nov 3, 2026.

How well do you match?

See how much of this posting your resume shows, and what it's missing.

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What it asks of you

5+ years of experience
“At least 5+ years of experience in low-level computing algorithm development, AI accelerator/ large scale parallel computing / high performance computing system design is” (quoted from the posting)
Master's degree asked for
“Master's or Doctoral degree in Computer Science or Electronic Engineering.” (quoted from the posting)

What the posting discloses

Not stated: Pay, real vacancy, AI screening.

Why these three

Ontario requires postings from employers with 25 or more staff to state the pay, whether the vacancy exists, and whether AI screens applicants.

Some employers add pay only on their own site. Check the original posting before you rule it out.

Skills mentioned

About the role

Huawei Canada has an immediate permanent opening for a Principal Scientist.

About the team

The Computing Data Application Acceleration Lab aims to create a leading global data analytics platform organized into three specialized teams using innovative programming technologies. This team focuses on full-stack innovations, including software-hardware co-design and optimizing data efficiency at both the storage and runtime layers. This team also develops next-generation GPU architecture for gaming, cloud rendering, VR/AR, and Metaverse applications.

One of the goals of this lab are to enhance algorithm performance and training efficiency across industries, fostering long-term competitiveness.

About the job

  • Build an accurate and universal AI performance model based on mainstream AI acceleration technologies to support theoretical analysis.
  • Track the emerging hardware designs in the industry, conduct in-depth insight and survey analysis, and identify the direction of key cutting-edge technologies.
  • Cooperate with our AI research team to identify key performance bottlenecks in future AI workloads, and define key algo-hw codesign features of our next-generation chips, for the objectives of low cost, high throughput, great scalability, and stability.
  • Performance modelling of representative AI workloads with state of the art training & inference algorithms on different hardware specs for quantitative analysis of compute, memory, IO and interconnect.
  • Lead our team for acceleration algorithm breakthrough in best tradeoff between model quality and compute efficiency.
  • Track the emerging algorithm-hardware codesign technologies in the industry, conduct in-depth insight and survey analysis, and deeply understand main directions and trends of cutting-edge algorithm-hardware codesign technologies.

About the ideal candidate

  • Master's or Doctoral degree in Computer Science or Electronic Engineering.
  • At least 5+ years of experience in low-level computing algorithm development, AI accelerator/ large scale parallel computing / high performance computing system design is an asset.
  • Deep understanding of the basic principles and workload characteristics of large language models / multimodal models, the popular AI software stack (operators, compilers, acceleration libraries, frameworks) and mainstream large model training and inference algorithms, such as hybrid parallelism, low precision data formats, sparsity, P/D splitting, etc.
  • Familiarity with microarchitecture of AI chips is an asset.

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