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About Altera

At Altera™, our independence as the world’s largest pure ‑ play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry ‑ leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

Join Altera's IP solutions team and work on cutting edge FPGA RTL and IP design!  Our team develops comprehensive solutions to provide customers easy and efficient access to the capabilities of Altera’s FPGA devices. These solutions are provided as highly configurable intellectual property (IP) cores that are fully integrated with Altera's software CAD tool, Quartus Prime. The External Memory Interfaces (EMIF) team is responsible for developing IPs for communication with state-of-the-art DDR and LPDDR devices. The ever-growing demand for faster and higher-density memories - especially in the data center and machine learning sectors - presents a challenging design problem that requires system-level knowledge of silicon, software, IP, and customer applications.

You will work with a team of engineers to develop and verify state-of-the-art firmware algorithms for calibrating and training DDR5, LPDDR5, and future DDR and LPDDR memories. You will be working on advanced FPGA architectures, design definition, implementation, and verification of this firmware. In this role, you will work closely with multiple teams, including silicon design, pre- and post-silicon validation, application engineering, and customer experience teams to ensure seamless development, integration, and optimization of our high-speed memory solutions.

Your specific responsibilities will include, but are not limited to the following

• Architecture and Design based on the latest protocol specifications for DDR and LPDDR devices
• Firmware development for Memory Calibration
• Device support and CAD tool integration
• Verification (e.g. verification IP, methodologies, frameworks, bus functional models, regression tests)
• Hardware power-on and debug
• New product release and rollout support
• Customer technical support

The candidate should possess the following behavioral traits

• Strong skills in communication, initiative, innovation, and teamwork