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  • Seen live on Volantis Semiconductor, Inc.'s site 3 days ago
  • Senior
  • Remote
Pay
Not stated
Location
Hybrid Remote/SF Bay Area/Austin/Boston
Open for
12+ days
First seen
Oct 23, 2026

Posting record

No flags

Open 12+ days

The posting's record, oldest first
  1. Volantis Semiconductor, Inc.'s site dates the posting
  2. Ghostless first sees this listing
  3. Last checked: still up
How we know

It hasn't been reposted, listed twice, or left up unusually long, and the posting doesn't say it's a talent pool.

Ghostless records the day it first sees a posting, so a repost can't reset its age. This one was already up when Ghostless started tracking Volantis Semiconductor, Inc., so its true age is longer.

Last checked Nov 1, 2026.

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What the posting discloses

Not stated: Pay, real vacancy, AI screening.

Why these three

Ontario requires postings from employers with 25 or more staff to state the pay, whether the vacancy exists, and whether AI screens applicants.

Some employers add pay only on their own site. Check the original posting before you rule it out.

About the role

What We’re Looking For

We’re looking for DFT engineers to contribute to and own DFT efforts for blocks and entire dies on the A-0 and A-1 wafer-scale systems.

Ideal Background

  • Experience leading DFT efforts for multiple advanced node SoC tapeouts

Nice to Have

  • Experience leading DFT efforts for large die area (eg reticle-max) chips
  • Experience leading DFT efforts for multi-die/multi-chiplet/MCM designs
  • Experience leading DFT efforts for AI accelerator SoCs

Something wrong with this posting?